Cédric Mayor has more than 9 years of experience in the semiconductor product design and industrialization.
Most recently in the Netherlands and in France, he was in charge of new product bring up and debug activitiy for NXP Semiconductors, especially on advanced process nodes in Asian foundries. Cedric also held product transfer and ramp-up positons supporting the NXP Corporate Operation sourcing. Prior to that, he was R&D memory design architect in charge of innovative SRAM/ROM compilers in a start up which became the SOI hard IP department of ARM Ltd.
Cédric graduated from Ecole Centrale Marseille in France, and holds a MS of Physics and Electrical Engineering and four patents in the area of chip design.