Cédric Mayor has more than a decade of experience in the semiconductor product design and industrialization.
Most recently in the Netherlands and in France, he was in charge of new product ramp up and debug activity for NXP Semiconductors, with a special focus on advanced process nodes in Asian foundries. Cedric also held product transfer and ramp-up positions supporting the NXP Corporate Operation sourcing. Prior to that, he was an R&D memory design architect in charge of innovative SRAM/ROM compilers in a start up, which became the SOI hard IP department of ARM Ltd.
Cédric graduated from Ecole Centrale Marseille in France; he holds an MS of Physics and Electrical Engineering and four patents in the area of chip design.